1. Field of the Invention
This invention relates to a microcomputer which has a function of confirming operation of a program or verifying validity of a program.
2. Description of the Prior Art
FIG. 1 is a diagrammatic view showing a conventional system for confirming operation of a program or verifying validity of a program on a microcomputer. Referring to FIG. 1, reference numeral 101 denotes a system to be debugged including a microcomputer 102 having a CPU 103, and 104 a microcomputer provided for debugging a program of the microcomputer 102 and including a dual port RAM 105 and a serial input/output circuit 106 connected to the dual port RAM 105. Reference numeral 108 denotes an address bus of the microcomputer 102, 109 a data bus of the microcomputer, and 110 a system bus signal line of the microcomputer. The microcomputer 104 accommodates the address bus 108, the data bus 109 and the system bus signal line 110. Reference numeral 107 denotes a serial output data line from the serial input/output circuit 106. It is to be noted that the system bus signal line 110 transmits system bus signals such as a memory read signal or a memory write signal.
Operation will be described subsequently. It is convenient if the process during or a result of calculation by a program can be monitored in order to confirm operation of the program or verify validity of the program on the microcomputer 102. The system shown in FIG. 1 is constructed so as to satisfy such demand. It is to be noted that debugging herein signifies monitoring of data in the RAM during execution of a program. Where the microcomputer 102 of the debug object system 101 is a one-chip microcomputer which includes a ROM, a RAM and so forth built therein, the built-in RAM is used in actual application. However, upon debugging, the dual port RAM 105 on the microcomputer 104 is used as a RAM. In particular, upon debugging, data are written into the dual port RAM 105 and data are read out from the dual port RAM 105 while the microcomputer 102 is executing a program.
In the microcomputer 104, contents of the dual port RAM 105 are outputted suitably to the outside by way of the serial input/output circuit 106 and the serial output data line 107. A monitor system placed outside (not shown) having a display unit and an outputting apparatus receives the contents of the dual port RAM 105 from the microcomputer 104. Data of the RAM of the microcomputer 102 during execution of a program are provided to the monitor system in such a manner as described above. Then, a debugging person determines whether the data obtained at the monitor system are desired data or valid data. Then, based on the determination, the debugging person determines whether or not the program on the microcomputer 102 is valid.
Since the conventional microcomputer 102 is constructed in such a manner as described above, the microcomputer 102 accesses the inside RAM when it is actually working, but it accesses the dual port RAM 105 by way of the address bus 108, the data bus 109 and the system bus signal line 110, that is, the external buses when it is debugged. Since the accessing by way of the external bus requires a longer time than the accessing by way of the internal bus, as the bus cycle is raised to a high speed, access to the dual port RAM 105 becomes impossible. In other words, as the bus cycle is raised to a high speed, debugging becomes impossible, and consequently, there is a problem in that there is a limitation in increasing of the speed of the bus cycle. It is to be noted that a microcomputer which has an operation mode for analysis or debugging of software is disclosed in Japanese Patent Laid-Open No. Hei 5-334114.